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Please use this identifier to cite or link to this item: http://ir.ncue.edu.tw/ir/handle/987654321/10353

Title: Enhancing Boosting with Semantic Register in a Superscalar Processor
Authors: Lai, Feipei;Chang, Meng-chou
Contributors: 電子工程學系
Date: 1992-05
Issue Date: 2012-05-22T06:46:02Z
Publisher: ACM New York, NY, USA
Abstract: IAS-S Supports boosting with “semantic register” and boosting boundary register to remove the dependences caused by conditional branches. In IAS-S, there is no dedicated shadow register file, and multiple levels of boosting is supported without multiple copies of register files. Any general-purpose register in IAS-S can be regarded as a sequential register or a shadow register flexibly. Furthermore, multi-way jump mechanism is combined with boosting to reduce the penalty due to frequent control transfers.
Relation: 19th Annual International Symposium on Computer Architecture (ACM SIGARCH Computer Architecture News, 20(4)), 1992年5月19-21日: 430
Appears in Collections:[電子工程學系] 會議論文

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