English  |  正體中文  |  简体中文  |  全文筆數/總筆數 : 6507/11669
造訪人次 : 30060187      線上人數 : 556
RC Version 3.2 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
搜尋範圍 進階搜尋

請使用永久網址來引用或連結此文件: http://ir.ncue.edu.tw/ir/handle/987654321/10353

題名: Enhancing Boosting with Semantic Register in a Superscalar Processor
作者: Lai, Feipei;Chang, Meng-chou
貢獻者: 電子工程學系
日期: 1992-05
上傳時間: 2012-05-22T06:46:02Z
出版者: ACM New York, NY, USA
摘要: IAS-S Supports boosting with “semantic register” and boosting boundary register to remove the dependences caused by conditional branches. In IAS-S, there is no dedicated shadow register file, and multiple levels of boosting is supported without multiple copies of register files. Any general-purpose register in IAS-S can be regarded as a sequential register or a shadow register flexibly. Furthermore, multi-way jump mechanism is combined with boosting to reduce the penalty due to frequent control transfers.
關聯: 19th Annual International Symposium on Computer Architecture (ACM SIGARCH Computer Architecture News, 20(4)), 1992年5月19-21日: 430
顯示於類別:[電子工程學系] 會議論文

文件中的檔案:

檔案 大小格式瀏覽次數
index.html0KbHTML743檢視/開啟


在NCUEIR中所有的資料項目都受到原著作權保護.

 


DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 回饋