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題名: | Handshaking Quasi-Adiabatic Logic |
作者: | Chang, Meng-chou;Tsai, Chia-Chang |
貢獻者: | 電子工程學系 |
日期: | 2009-08
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上傳時間: | 2012-05-22T06:47:36Z
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出版者: | IEEE |
摘要: | This paper proposes a novel handshaking quasi-adiabatic logic (HQAL) circuit, which combines the advantages of adiabatic logics with those of asynchronous circuits. A HQAL circuit is composed of adiabatic logic blocks and the handshake control chain (HCC). The power of the adiabatic logic blocks in HQAL is controlled and supplied by the HCC, and the logic blocks in HQAL become active only when performing useful computations. With the handshake control chain, the HQAL circuit can avoid the problem of data token overriding, which may occur in conventional asynchronous adiabatic logic (AAL) circuits. Simulation results showed that the HQAL implementation of a pipelined Sklansky adder can achieve 33.1% reduction in power dissipation, compared to the CMOS implementation, for a data rate of 700 MHz and 72.5% reduction in power dissipation for a data rate of 10 MHz. |
關聯: | The 52nd. IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2009), Canc�n, M�xico, August 2-5, 2009: 531-534 |
顯示於類別: | [電子工程學系] 會議論文
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