National Changhua University of Education Institutional Repository : Item 987654321/10840

English | 正體中文 | 简体中文 | Items with full text/Total items : 6507/11669
Visitors : 29930455 Online Users : 481

RC Version 3.2 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.

Scope Adv. Search

Login ‧ Upload ‧ Help ‧ About ‧ Administer

NCUEIR > College of Engineering > Department and Graduate Institute of Electronic Engineering > Periodical Articles > Item 987654321/10840

Please use this identifier to cite or link to this item: http://ir.ncue.edu.tw/ir/handle/987654321/10840

Title:	A Low-Power Direct Digital Frequency Synthesiser
Authors:	Yi, Shu-Chung;Chen, Jin-Jia;Lin, Chien-Hung;Lee, Kun-Tse
Contributors:	電機工程學系
Keywords:	Direct digital frequency synthesiser (DDFS);Frequency synthesiser;Lookup table ROM;Digital circuit design
Date:	2008-01
Issue Date:	2012-06-04T08:35:10Z
Publisher:	Taylor and Francis Ltd.
Abstract:	This work presents a low power direct digital frequency synthesiser (DDFS) by using a new two-level lookup table algorithm. The algorithm uses trigonometric double angle formula to divide lookup table ROM into two parts. The ROM size of the proposed architecture is 25% less than that of conventional lookup table DDFS. The hardware of new DDFS architecture compared to the traditional two-level table DDFS also requires less one multiplication. A synthesised 0.35 µm DDFS with an spurious free dynamic range of −80 dB, runs up to 100 MHz and consumes 81 mW at 3.3 v. The power efficiency is 0.81 mW MHz−1, which represents an enhancement of more than 38% compared to the conventional DDFS.
Relation:	International Journal of Electronics, 95(6): 593-599
Appears in Collections:	[Department and Graduate Institute of Electronic Engineering] Periodical Articles

Files in This Item:

File	Size	Format
index.html	0Kb	HTML	628	View/Open