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Please use this identifier to cite or link to this item:
http://ir.ncue.edu.tw/ir/handle/987654321/10888
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| Title: | A Low-Power Efficient Direct Digital Frequency Synthesizer Based on New Two-Level Lookup Table |
| Authors: | Yi, S.-C.;Lee, K.-T.;Chen, Jin-Jia;Lin, C.-H. |
| Contributors: | 電機工程學系 |
| Keywords: | DDFS;Low power;VLSI;Frequency;Synthesizer |
| Date: | 2006-05
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| Issue Date: | 2012-06-04T09:11:24Z
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| Publisher: | IEEE |
| Abstract: | This workpresents a low power direct digitalfrequency synthesizer (DDFS) by using a new two-level lookup table algorithm. The algorithm uses trigonometric double angle formula to divide ROM lookup table into two parts. The ROM size of the proposed architecture is 25% less than
that of conventional two-level table. The hardware complexity of the new DDFS architecture compared to the traditional two-level table DDFS can be omitted one multiplier. A synthesized 0.35-pm DDFS with a SFDR of - 80dB, runs up to 100MHz and consumes 81-mW at 3.0v.
The power efficiency is 0.81-m W/MHz, which represents an enhancement of more than 38% compared to the conventional DDFS. |
| Relation: | 2006 IEEE Canadian Conference on Electrical and Computer Engineering, Ottawa, Canada, May 7-10, 2006: 68-71 |
| Appears in Collections: | [電機工程學系] 會議論文
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