National Changhua University of Education Institutional Repository : Item 987654321/10889

English | 正體中文 | 简体中文 | Items with full text/Total items : 6507/11669
Visitors : 29896493 Online Users : 261

RC Version 3.2 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.

Scope Adv. Search

Login ‧ Upload ‧ Help ‧ About ‧ Administer

NCUEIR > College of Engineering > Department and Graduate Institute of Electronic Engineering > Proceedings > Item 987654321/10889

Please use this identifier to cite or link to this item: http://ir.ncue.edu.tw/ir/handle/987654321/10889

Title:	The New Architecture of Radix-4 Chinese Abacus Adder
Authors:	Yi, S.-C.;Lee, K.-T.;Chen, Jin-Jia;Lin, C.-H.;Wang, C.-C.;Hsieh, C.-F.;Lu, C.-Y.
Contributors:	電機工程學系
Date:	2006-05
Issue Date:	2012-06-04T09:11:28Z
Publisher:	IEEE Computer Society
Abstract:	In this paper, we present a new architecture of Chinese abacus adder. As high radix of adder may reduce the number of carry propagation, the proposed Chinese abacus adder may achieve high-speed operation. The simulation results of our work are compared with CLA (Carry Look-ahead) adder. The delay of the 8-bit abacus adders are 22%, 17%, and 14% less than those of CLA adders for 0.35�m, 0.25�m, and 0.18�m technologies, respectively. The power consumption of the abacus adders are 30%, 34%, and 60% less than those of CLA adders for 0.35�m, 0.25�m, and 0.18�m technologies, respectively. The use of Chinese abacus approach results a competitive technique with respect to conventional fast adder.
Relation:	36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006, Singapore, May 17-20, 2006: 12
Appears in Collections:	[Department and Graduate Institute of Electronic Engineering] Proceedings

Files in This Item:

File	Size	Format
index.html	0Kb	HTML	654	View/Open