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請使用永久網址來引用或連結此文件:
http://ir.ncue.edu.tw/ir/handle/987654321/11398
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| 題名: | Electrode Design Optimization of a CMOS Fringing-Field Capacitive Sensor |
| 作者: | Li, Yu-Ting;Tzeng, Yen-Lin;Chao, Chih-Ming;Wang, Kerwin |
| 貢獻者: | 機電工程學系 |
| 關鍵詞: | Fringing field;Capacitance;Mesh-electrode |
| 日期: | 2012-03
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| 上傳時間: | 2012-06-06T01:44:10Z
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| 出版者: | IEEE |
| 摘要: | The capacitance of a micro-capacitive-sensor is mainly depends on its electrode structures, electrode arrangement and the dielectric strength of its surrounding. This paper presents a novel electrode design to enhance the fringingfield and to increase the capacitance of a CMOS MEMS
capacitive sensor. The design optimization process is assisted by COMSOL, a multi-physics finite-element simulation tool. The design goal is to maximize the fringing-field of capacitive sensor. The capacitor has been built with a VLSI Schmitt trigger, and temperature compensator to probe the capacitance. The experiment results show that proposed capacitor can achieve the capacitance to 75.2 pF. |
| 關聯: | The 7th Annual IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS), Kyoto, Japan, March 5-8, 2012 |
| 顯示於類別: | [機電工程學系] 會議論文
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