National Changhua University of Education Institutional Repository : Item 987654321/11658
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題名: Low Overhead Design for Programmable Logic Array with Testability
作者: Wei, Kai-Cheng;Sheu, J. J.;Liu, B. D.
貢獻者: 資訊工程系
日期: 1994
上傳時間: 2012-06-18T02:34:14Z
出版者: Taylor
摘要: A new design to reduce the overhead required for a fully testable PLA is proposed. This design rearranges and groups the product lines into partitions. Then, one extra output line per partition is added to make the whole PLA testable. The silicon area overhead required by this design is significantly less than those of previous methods.
關聯: Int. J. Electronics, 77(2): 241-250
顯示於類別:[資訊工程學系] 期刊論文

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