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http://ir.ncue.edu.tw/ir/handle/987654321/11659
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題名: | An efficient Algorithm for Selecting Bipartite Row and Column Folding of Programmable Logic Arrays |
作者: | Liu, B. D.;Wei, Kai-Cheng |
貢獻者: | 資訊工程系 |
日期: | 1994-07
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上傳時間: | 2012-06-18T02:34:27Z
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出版者: | Institute of Electrical Engineers |
摘要: | Werent from the previous PLA folding algorithms which perform row and column foldhgs independently, we propose an algorithm to obtain bipartite row or column folding “ I t on the same graph. The PLA personality matrix is modeled as a graph and the folding problem is modeled as a partitioning problem. Experimental results show that this algorithm can lead a good guide to select row or column folding for reducing the chip area of the PLA efliciently. |
關聯: | IEEE Trans. Circuits Syst., 41(7): 494-498 |
顯示於類別: | [資訊工程學系] 期刊論文
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