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NCUEIR > College of Engineering > Department and Graduate Institute of Computer Science and Information Engineering > Proceedings > Item 987654321/11664

Please use this identifier to cite or link to this item: http://ir.ncue.edu.tw/ir/handle/987654321/11664

Title:	低功率高速可規劃邏輯陣列運用電荷回收
Authors:	蕭荃泰;魏凱城
Contributors:	資訊工程系
Date:	2009-06
Issue Date:	2012-06-18T02:34:53Z
Publisher:	大同大學資訊工程學系
Relation:	2009資訊科技與應用產學研討會, 大同大學資訊工程學系, 台灣, 2009年6月26日
Appears in Collections:	[Department and Graduate Institute of Computer Science and Information Engineering] Proceedings

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