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請使用永久網址來引用或連結此文件:
http://ir.ncue.edu.tw/ir/handle/987654321/14017
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題名: | A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates |
作者: | Lin, How-Rern;Chiu, Wei-Hao;Wu, Tsung-Yi |
貢獻者: | 電子工程學系 |
關鍵詞: | Leakage power;Leakage tolerance;High performance;Domino logic |
日期: | 2009
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上傳時間: | 2012-09-10T02:48:55Z
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出版者: | Oxford University Press |
摘要: | A new conditional isolation technique (CI-Domino) in domino logic is proposed for wide domino gates. This technique can not only reduce the subthreshold and gate oxide leakage currents simultaneously without sacrificing circuit performance, but also it can be utilized to speed up the evaluation time of domino gate. Simulations on high fan-in domino OR gates with 0.18�m process technology show that the proposed technique achieves reduction on total static power by 36%, dynamic power by 49.14%, and delay time by 60.27% compared to the conventional domino gate. Meanwhile, the proposed technique also gains about 48.14% improvement on leakage tolerance. |
關聯: | IEICE Transactions on Electronics, E92-C(4): 386-390 |
顯示於類別: | [電子工程學系] 期刊論文
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文件中的檔案:
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大小 | 格式 | 瀏覽次數 |
2050300610001.pdf | 25Kb | Adobe PDF | 445 | 檢視/開啟 |
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