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题名: IR Drop Reduction Via a Flip-Flop Resynthesis Technique
作者: Wu, Jiun-Kuan;Wu, Tsung-Yi;Lu, Liang-Ying;Chen, Kuang-Yao
贡献者: 電子工程學系
日期: 2008-03
上传时间: 2012-09-10T02:55:51Z
出版者: Institute of Electrical and Electronics Engineers
摘要: Clock skew scheduling for peak current reduction is a conventional technique for solving IR-drop problem in physical design stage. In this paper, we propose two kinds of long delay flip-flops and a heuristic algorithm that is used to resynthesize flip-flops of a circuit. Because the switching times of flip-flops in the resynthesized circuit are staggered, the IR drop effect can be reduced. Unlike clock skew scheduling, our technique
not only can be used in physical design stage but also in logic design stage. The other advantages of our technique over the clock skew optimization technique are that our technique has less area overhead and has more opportunities to find a better result.
關聯: 9th International Symposium on Quality Electronic Design, ISQED 2008, San Jose, CA, March 17-19, 2008: 78-83
显示于类别:[電子工程學系] 會議論文


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