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Title: A Novel Bottom-Up Fabrication Process for Controllable Sub-100 nm Magnetic Multilayer Devices
Authors: Kao, Ming-Yuan;Ou, J. Y.;Horng, Lance;Wu, Jong-Ching
Contributors: 物理學系
Keywords: CPP configuration;Phase changed memory;Spin valve;Stencil mask
Date: 2008-11
Issue Date: 2013-02-05T02:20:21Z
Publisher: IEEE
Abstract: We present a fabrication process for controllable sub-100 nm magnetic multilayer devices, pseudo spin valve, using a novel bottom-up technique. Stack of multilayer devices with diameter in nanometer scales were successfully made through a template of Ge/SiO2 stencil mask with very well undercutting profile of SiO2 insulating layer. The niche of using this method is that a device with diameter below 100 nm can be made through a twice larger Ge hole of stencil mask. The desired dimension of the active device layers was achieved with a thick buffer metal layer deposited first, giving rise to a narrower neck for later active layers deposition. Moreover, this stencil mask technique can be utilized as device templates of not only magnetic multilayer devices but also other nano-sized devices such as phase changed memory devices.
Relation: IEEE Trans. on Magnetics, 44(11): 2734-2736
Appears in Collections:[Department of Physics] Periodical Articles

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