National Changhua University of Education Institutional Repository : Item 987654321/15425
English  |  正體中文  |  简体中文  |  全文笔数/总笔数 : 6507/11669
造访人次 : 29897161      在线人数 : 304
RC Version 3.2 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
搜寻范围 进阶搜寻

jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://ir.ncue.edu.tw/ir/handle/987654321/15425

题名: A Novel Bottom-Up Fabrication Process for Controllable Sub-100 nm Magnetic Multilayer Devices
作者: Kao, Ming-Yuan;Ou, J. Y.;Horng, Lance;Wu, Jong-Ching
贡献者: 物理學系
关键词: CPP configuration;Phase changed memory;Spin valve;Stencil mask
日期: 2008-11
上传时间: 2013-02-05T02:20:21Z
出版者: IEEE
摘要: We present a fabrication process for controllable sub-100 nm magnetic multilayer devices, pseudo spin valve, using a novel bottom-up technique. Stack of multilayer devices with diameter in nanometer scales were successfully made through a template of Ge/SiO2 stencil mask with very well undercutting profile of SiO2 insulating layer. The niche of using this method is that a device with diameter below 100 nm can be made through a twice larger Ge hole of stencil mask. The desired dimension of the active device layers was achieved with a thick buffer metal layer deposited first, giving rise to a narrower neck for later active layers deposition. Moreover, this stencil mask technique can be utilized as device templates of not only magnetic multilayer devices but also other nano-sized devices such as phase changed memory devices.
關聯: IEEE Trans. on Magnetics, 44(11): 2734-2736
显示于类别:[物理學系] 期刊論文

文件中的档案:

档案 大小格式浏览次数
index.html0KbHTML537检视/开启


在NCUEIR中所有的数据项都受到原著作权保护.

 


DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 回馈