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請使用永久網址來引用或連結此文件: http://ir.ncue.edu.tw/ir/handle/987654321/1718

題名: Spatial Scanning-Probe Array System for Silicon-on-Insulator Integrated Circuits
作者: Wen-Ren Yang
貢獻者: 電機工程學系
日期: 2008
上傳時間: 2010-11-12T06:55:08Z
摘要: A spatial scanning-probe array system for silicon-oninsulator (SOI) integrated circuit is proposed in this paper. The operating fundamentals, specifications, and simulations are presented in this paper. The proposed system is designed to scan the circuit in order to examine the surface and detect die cracks. The post signal processing by using discrete wavelet transform(DWT) for scattered optical signal is also proposed and
simulated.
關聯: The 51st IEEE Midwest Symposium on Circuits and Systems, August 10-13, 2008:910-913
顯示於類別:[電機工程學系] 會議論文

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