National Changhua University of Education Institutional Repository : Item 987654321/1734
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题名: A Multiplier Based on the Algorithm of Chinese Abacus
作者: Lin, C.-H.;Yi, S.-C.;Chen, J.-J.
贡献者: 積體電路設計研究所
关键词: Braun Array Multiplier
Chinese Abacus Multiplier
Fast Multiplier
日期: 2009-01
上传时间: 2010-11-12T07:21:50Z
摘要: A 4x4 and 8x8 bit multiplier is demonstrated based on the Chinese abacus. As comparing the simulation result of this work with the speed of the 4x4 and 8x8 bits Braun array multiplier, the delays of the 8-bit abacus
multiplier are 14% and 7.5% less than that of Braun array multiplier with 0.35μm and 0.18μm technologies, respectively. Meanwhile, the power consumption of the 8-bit abacus multiplier is, respectively, less about 11.9% and 22.3% also.
關聯: WSEAS Transactions on Electronics, 6(1), 2009:11-22
显示于类别:[積體電路設計研究所] 期刊論文

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