English  |  正體中文  |  简体中文  |  Items with full text/Total items : 6469/11641
Visitors : 18437193      Online Users : 105
RC Version 3.2 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
Scope Adv. Search
LoginUploadHelpAboutAdminister

Please use this identifier to cite or link to this item: http://ir.ncue.edu.tw/ir/handle/987654321/18574

Title: A Novel Bottom-Up Fabrication Process for Controllable Sub-100 nm Magnetic Multilayer Devices
Authors: Kuo, Ming-Yuan;Ou, J. Y.;Horng, Lance;Wu, Jong-Ching
Contributors: 物理學系
Keywords: CPP configuration;Phase changed memory;Spin valve;Stencil mask
Date: 2008-11
Issue Date: 2014-06-06T07:18:59Z
Publisher: IEEE
Abstract: We present a fabrication process for controllable sub-100 nm magnetic multilayer devices, pseudo spin valve, using a novel bottom-up technique. Stack of multilayer devices with diameter in nanometer scales were successfully made through a template of Ge/SiO2 stencil mask with very well undercutting profile of SiO2 insulating layer. The niche of using this method is that a device with diameter below 100 nm can be made through a twice larger Ge hole of stencil mask. The desired dimension of the active device layers was achieved with a thick buffer metal layer deposited first, giving rise to a narrower neck for later active layers deposition. Moreover, this stencil mask technique can be utilized as device templates of not only magnetic multilayer devices but also other nano-sized devices such as phase changed memory devices.
Relation: IEEE Transactions on Magnetics, 44(11): 2734-2736
Appears in Collections:[物理學系] 期刊論文

Files in This Item:

File SizeFormat
index.html0KbHTML320View/Open


All items in NCUEIR are protected by copyright, with all rights reserved.

 


DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - Feedback