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Please use this identifier to cite or link to this item: http://ir.ncue.edu.tw/ir/handle/987654321/19088

Title: High-yield Performance-efficient Redundancy Analysis for 2D Memory
Authors: Huang, Tsung-Chu
Contributors: 電子工程學系 
Keywords: Cluster faults;Fault tollerant;Hypercube;Memory repairing;Redundancy analysis;Remapping architecture
Date: 2011-08
Issue Date: 2014-10-27T08:06:24Z
Publisher: Springer
Abstract: High-yield performance-efficient remapping architecture, repairing algorithms and redundancy analysis (HYPERA) are proposed for 2D memory. The proposed hypercube-based memory repair architecture consists of spare row-like subcubes with a modified ternary CAM with an address concentrator and a parallel sorter-like address concentrator. Generally, for an acceptable repair rate about 3% of spare subcubes and no more than 5% of hardware overhead are required. A modified Quine-McCluskey algorithm and the Essential Cube Pivoting algorithm are also developed for redundancy analysis. Almost 100% of repair rate can be obtained using only 32 equivalent rows under reasonable situations. Under less spare memory the repair rates of proposed approaches can be much higher than most results of previous work.
Relation: Science China Information Sciences, 54(8): 1663-1676
Appears in Collections:[電子工程學系] 期刊論文

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