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題名: | Vector Control Technique and Sleep-Transistor Allocation for Supply-Gating Current Spike Reduction in Power Management |
作者: | Tzeng, Jing-Chi;Huang, Tsung-Chu |
貢獻者: | 電子工程學系 |
日期: | 2005-11
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上傳時間: | 2014-10-27T08:08:09Z
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出版者: | IEEE |
摘要: | Power-gating is an effective approach for reducing both dynamic and static power dissipation in power management and test scheduling. This paper formulates the power-gating spike problem, derives a reduced power dissipation model as heuristics, proposes a vector control technique for post-gating circuits, and develops a sleep-transistor allocation scheme for power-on/off current spikes reduction of pre-gating systems. From experimental results, a justified controlling vector can reduce the on/off peak power up to 55%. For a pre-gating system, more than 83% of the power-gating spike can be reduced. From our preliminary simulations using HSPICE so far, this heuristics has been proved to reduce the supply-gating current spike |
關聯: | 2005 2nd International Conference on Mobile Technology, Applications and Systems |
顯示於類別: | [電子工程學系] 會議論文
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