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http://ir.ncue.edu.tw/ir/handle/987654321/19136
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題名: | HYPERA: High-Yield Performance-Efficient Redundancy Analysis |
作者: | Huang, Tsung-Chu;Lu, Kuei-Yeh;Huang, Yen-Chieh |
貢獻者: | 電子工程學系 |
日期: | 2010-12
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上傳時間: | 2014-10-27T08:08:43Z
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出版者: | IEEE |
摘要: | A novel memory repair architecture based on redundant hypercube is proposed, which mainly consists of a modified ternary CAM with an address bubble-shifter. Generally for an acceptable repair rate about 3% of spare sub cubes and no more than 5% of hardware overhead are required. A modified Quine-McCluskey algorithm and the Essential Cube Pivoting algorithm are also developed for redundancy analysis. Almost 100% of repair rate can be obtained using only 32 equivalent rows under reasonable situations. Under less spare memory the repair rates of proposed approaches can be much higher than most results of previous work. |
關聯: | 2010 19th IEEE Asian Test Symposium (ATS), : 231-236 |
顯示於類別: | [電子工程學系] 會議論文
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