National Changhua University of Education Institutional Repository : Item 987654321/11657

English | 正體中文 | 简体中文 | Items with full text/Total items : 6507/11669
Visitors : 30055291 Online Users : 657

RC Version 3.2 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.

Scope Adv. Search

Login ‧ Upload ‧ Help ‧ About ‧ Administer

NCUEIR > College of Engineering > Department and Graduate Institute of Computer Science and Information Engineering > Periodical Articles > Item 987654321/11657

Please use this identifier to cite or link to this item: http://ir.ncue.edu.tw/ir/handle/987654321/11657

Title:	Combining the Folding and Testing for Programmable Logic Arrays
Authors:	Wei, Kai-Cheng;Liu, B. D.
Contributors:	資訊工程系
Date:	1994
Issue Date:	2012-06-18T02:34:00Z
Publisher:	World Scientific Publishing
Abstract:	Different from the previous techniques which treated the folding and testing for PLAs as separate problems, this paper presents a new approach to combine the bipartite folding and testing for PLA’s in the same procedure. Fewer silicon area than other existing comparable techniques is required to make the PLA testable. Experimental results show that this technique can reduce chip area, test length, test storage and time complexity.
Relation:	Journal of Circuits systems and Computers, 4(3): 305-317
Appears in Collections:	[Department and Graduate Institute of Computer Science and Information Engineering] Periodical Articles

Files in This Item:

File	Size	Format
2050400610001.pdf	69Kb	Adobe PDF	477	View/Open