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| 題名: | High-performance Built-in Self-routing for Through-silicon Vias |
| 作者: | Huang, Tsung-Chu |
| 貢獻者: | 電子工程學系 |
| 日期: | 2012-04
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| 上傳時間: | 2014-10-27T08:06:35Z
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| 出版者: | Institution of Engineering and Technology |
| 摘要: | In this reported work, a built-in self-routing scheme is developed for exploring the through-silicon via (TSV) redundancy to the extremes. A built-in self-router consists of a built-in self-tester for testing the TSVs, and a priority switching network for selecting from M TSVs to N inter-chip interconnects. A switching cell is developed to sequentially construct the priority switching network for area reduction and synthesis regularity. Although a long latency is needed for the encoding network, the best performance during inter-chip communication can be achieved due to only one switch per tier in normal operations. In a multiple fault model with no more than M-N defected TSVs, the repair rate can be always 100. |
| 關聯: | Electronics Letters, 48(9): 480-482 |
| 顯示於類別: | [電子工程學系] 期刊論文
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